DESCRIPTIONS OF TUTORIALS


T1.1  
3D Graphics for Mobile and Handheld Devices - Basics,
Technical Challenges and Standards
 
 
Presenters:
Reinhard Moeller, University of Wuppertal, Germany
Mathieu Robart, STMicroelectronics, UK
 
 
Organizer:
Uwe E. Kraus, Bergische University, Germany
 
  Abstract
 
  For a long time 3D Graphics has been an application domain for high end hardware and software systems. It was first applied to more or less static image generation like in CAD workstations and used for offline rendering of synthetic images in film production. Less powerful hardware had to be advanced by special graphics software. On the other hand there were specially designed high-bandwidth hardware systems used for real-time image generation used in flight simulators, for example.
 
  But today, as hardware cost decrease while the power of graphics chips is instantly improving, the border between high end and low end graphics vanishes more and more. 3D Graphics hardware appears in an increasing number of consumer products, from game consoles to mobile phones and handheld devices. At the same time, standardized application programmers interfaces (API) and well-defined platform independent graphics standards are developed. Also convergence between video and graphics architecture starts to appear since many synergies can be exploited between the two processing systems.
 
  This tutorial will provide a technical introduction to computer graphics in general, presenting the main concepts behind 3D rendering such as transformations, rasterization, color and illumination modeling and texturing, along with the corresponding mathematical elements and applications. Recent standards such as OpenGL and OpenGL|ES 1.1 and 2.0 will also be covered, including shaders support, programmability and demo using GL Shading Language (GLSL).
 
  Reinhard Moeller received his doctor degree in Electrical Engineering in 1986 from the University of Wuppertal, Germany. Since that time he has been working as a assistant lecturer. He is teaching Human-Process-Communication, Computer Graphics, CAD and Object technology. After his habilitation in 1995 he got the venia legendi for Process Informatics from the University of Wuppertal. Reinhard's research and development activities cover Computer Graphics hard- and software architectures for realtime image generation and multimedia human-computer interaction. He is member of IEEE CS, EUROGRAPHICS, GI and VDE.
 
  Mathieu Robart received a Ph.D. in Computer Graphics in 1999 from Paul Sabatier University in Toulouse, France. From 2000, he is working for STMicroelectronics, in Bristol, UK. At ST, Mathieu's research and developments covered different domains of computer graphics, including graphics hardware architecture, OpenGL-oriented graphics pipelines, global illumination, shaders and real-time rendering. He is currently working as Senior Graphics Engineer for the Advanced System Technology (AST) division of ST, specialized in R&D on Computer Graphics for Mobile Devices, and is member of ACM/Siggraph.




T1.2  
Content Analysis for Multimedia Applications and Home Servers
 
 
Presenters:
Jan Nesvadba, Philips Research, The Netherlands
Dirk Farin, Eindhoven University of Technology, The Netherlands
 
 
Organizer:
Peter H. N. de With
Logica CMG / TU Eindhoven Eindhoven, The Netherlands
 
  Abstract
 
  The ever-increasing complexity of generic Multimedia-Content-Analysis-based (MCA) solutions, their processing power demanding nature and the need to prototype and assess solutions in a fast and cost-saving manner request for new systems and frameworks. Furthermore, recent research results in the field of Multimedia Content Analysis (MCA) have been marked by an abundance of theoretical and algorithmic solutions covering narrow application domains only. The combination of state-of-the-art network and grid-computing solutions and recently standardized interfaces facilitated the set-up of such frameworks, a potential basis for generic and cross-domain solutions. Such systems can, furthermore, be used to simulate distributed computing scenarios for e.g. Distributed Content Analysis (DCA) across Consumer Electronics (CE) In-Home networks, but also the rapid development and assessment of complex (generic) multi-MCA-algorithm-based applications and system solutions.
 
  During the first part of the tutorial a concept solution of such a framework will be presented, in which multiple Video Content Analysis (VCA) and MCA algorithms are combined in a modular way - logical VCA / MCA units are wrapped into so-called Service Units (SU), which eases the split between system-architecture- and algorithmic-related work and additionally facilitate reusability, extensibility and upgradeability of those SUs. In addition, related needs and challenges of improving the generic multi-domain potential of MCA algorithms will be discussed.
 
  In the second part of the tutorial, we describe a generic video-object segmentation system, which can be used as the core in an advanced video-content analysis system. Algorithmic details are provided for the main stages of the segmentation algorithm. In particular, we first concentrate on the parametric modeling of camera-motion and its robust estimation in the presence of foreground object-motion. Second, the synthetization of sprite-images of the scene background is described including its generalization to apply the multi-sprite technique in order to allow for arbitrary rotational camera-motion and to prevent the loss of detail during camera zoom-in operations. Finally, the object-mask generation with change-detection algorithms using Markov-Random fields models for object-shape regularization is discussed.
 
  The presented segmentation algorithm can be extended in various directions to either improve the segmentation or to extract semantically higher information. As example, we present a graph-based model to describe and recognize specific objects. This enables the specific segmentation or detection of user-defined objects. As another example extension, we discuss the computation of physical camera-motion parameters, such as absolute rotation angles and zooming information, from the presented motion-estimation parameters. These physically meaningful parameters provide valuable information for a higher-level video analysis.
 

  Jan Nesvadba obtained his M.Sc. (cum laude) in electrical engineering (telecommunication and information technology) from the Technical University of Vienna, Austria, in 1997. He did his M.Sc. thesis in the field of electro-biology on di-electrophoresis of biological cells. Currently, he is finalizing his Ph.D. thesis at Labri, Univ. of Bordeaux, France. He joined Philips Research, The Netherlands, in 1998 and started his research career working on digital return channels for HybridFiberCoax (HFC)-networks. His current fields of investigation as senior scientist at Philips Research are retrieval algorithms (multimedia content analysis, computer vision, multimedia signal processing), related smart system architectures (e.g. distributed content analysis for Consumer Electronics in-home networks, grid computing) for audiovisual content analysis, the adaptation of existing ICs (encoders, codecs) for the real-time generation of content descriptors (e.g. MPEG-7) and the optimal use of these descriptors in consumer storage devices and user interfaces. He has published extensively in those fields (conference-, journal papers, book chapters, international patents), he is active member of various national and international projects (e.g. ITEA AVIR, ITEA CANDELA, bsik MultimediaN) and he is active committee member of multiple related conferences.
     
  Dirk Farin graduated in computer science and electrical engineering from the University of Stuttgart, Germany. In 1999, he became research assistant at the Department of Circuitry and Simulation at the University of Mannheim. He joined the Department of Computer Science IV at the University of Mannheim in 2001. Since 2004, he is with the Video Coding and Architectures group at the Technical University of Eindhoven, Netherlands. In 2005, he received his Ph.D. degree from the Technical University of Eindhoven for his work on automatic video segmentation employing object and camera-motion modeling techniques. He received a best student paper award at the Visual Communications and Image Processing conference in 2004 for his work on multi-sprites, and two best student paper awards at the Symposium on Information Theory in the Benelux in 2001 and 2003. Apart from video-object segmentation, his research interests include video compression, content analysis, and 3-D reconstruction. Currently, he is involved in a joint project of Philips and the Technical University Eindhoven about the development of video capturing and compression systems for 3-D television. Mr.~Farin is member of the program committee of the IEEE ICIP conference and reviewer for several journals including IEEE Multimedia and IEEE CSVT.




T2.1  
Dependable Component Based Software for CE Devices
 
 
Presenters:
Egor Bondarev, Eindhoven University of Technology, The Netherlands.
Jean Gelissen, Philips Research in Eindhoven, The Netherlands.
Hugh Maaskant, Philips Research in Eindhoven, The Netherlands.
Ronan Mac Laverty, Nokia Research Center, Finland
 
 
Organizer:
Peter H. N. de With
LogicaCMG/TU Eindhoven, The Netherlands
 
  Abstract
 
  In today's consumer electronic products, a large part of the functionality is realized in software. As software is notoriously difficult and expensive to develop, manufacturers constantly look for more effective ways to construct this software. The typical solution is to integrate third party software components and to construct the software for a family of products rather than for a single product. This calls for a standard component model so that software developed by various independent software vendors can indeed be integrated (composed) into a system.
 
  While component based software is common in desk-top computers this is not yet the case for consumer electronic products, primarily because of the cost and dependability demands on these products. Over the last couple of years a consortium of large and small companies, together with academia, has developed a software architecture that specifically addresses these demands. This was achieved in two European co-funded (ITEA) projects, called Robocop and Space4U. The architecture comprises a component model, a number of run-time frameworks, as well as techniques for predictable assembly of components. The architecture supports component trading, dynamic upgrading and extension of products in the field, and dependable operation.
 
  In this tutorial we will introduce the technical elements of the architecture and show how they solve the issues in the domain of consumer electronics. In particular we will introduce the component model, the core of the architecture, give an outline of the resource management and the fault management frameworks, and introduce a technique for predicting timing properties of compositions of components. Finally, we will give a brief status update of the ISO standardization efforts that are currently underway
 
  Egor Bondarev received his MSc degree in robotics and informatics from the State Polytechnic University, Belarus Republic, in 1997. In 2003, he completed the post-graduation designer's course of the Eindhoven University of Technology (TU/e) and received a professional doctorate in engineering in September 2003. Currently, he is a Researcher at the System Architectures and Networking group and Video Coding Architectures group, Eindhoven University of Technology, The Netherlands. He is focusing on the design of real-time component-based software, in particular on the performance prediction of component-based systems on multiprocessor architectures. He was involved in several European research projects and now he is the TU/e project leader in the Trust4All ITEA project, focusing on composition and verification of trust models for component-based systems.
 
  Jean Gelissen studied at the Poly Technical School in Venlo, the Netherlands (graduated in Electronics, 1977) and did a Post Graduate Course in Utrecht, The Netherlands (graduated in Informatics, 1986). His professional career started in 1977 at Philips Research in Eindhoven, The Netherlands. He started in digital signal processing, both in software and hardware development and gained large experience in setting up computer networks. His present position is Department Head of the IPA (Information Processing Architectures) department of the sector Digital Society at the Philips Research in Eindhoven, The Netherlands. Jean Gelissen has been involved in international projects since 1987. He was involved in the Esprit program in formal specification methods in the METEOR project, software design environments in the ATMOSPHERE project and multi-media in several projects such as SOMMIT and NexTV. Before this he also participated in the SAFE project in the DELTA program. His management responsibilities started with the technical management of the OSMOSE project on common publishing platforms. He was the Philips project manager of the ACTS SOMMIT project and was involved in setting up two OMI projects. Recently he has been involved in the preparations of the IST NexTV project and was an active member of the OPIMA specification initiative that has resulted in the IST OCCAMM project. He has been the project leader of the ITEA projects EUROPA (Call 1), ROBOCOP (Call 3) and Space4U (Call 5) and is currently the project leader of the ITEA project Trust4All (Call 7). In the IST FP5 program he has been the project leader of the OZONE project and in the FP6 program initiated the Amigo IP and the Betsy STREP. He has also been active in Philips contributions to DAVIC and DVB and is the head of the Dutch delegation to MPEG and contributed to MPEG-4 (V2) and MPEG-21 (DIA). At the moment he is the coordinator of the Middleware standardisation work item of MPEG (M3W).
 
  Hugh Maaskant received his MSc in Electronics Engineering from the Twente University of Technology, The Netherlands, in 1980. After his studies, Hugh joined Philips as a Software Engineer for embedded software for scientific equipment. After some three years he became the software architect for a distributed real-time operating system targeted at industrial control applications. Hereafter he briefly joined the commercial department for this product. He then switched hats and became SW Development Manager for the Medical Ultrasound group, based in Santa Ana, Ca where he later became the Director of Engineering. After returning to the Netherlands in 1993 he became the Development Manager for Medical Imaging Workstations in Best. From there he moved to Philips' Research labs to work on software for high volume CE equipment. After a two year intermezzo as Director of Engineering for professional Video Servers in Salt Lake City, Ut, Hugh returned to his former Research group. Here he now holds a position as cluster leader, specializing in architecting software product families and component based engineering for high volume electronics. In this role he has been one of the lead architects in the ITEA Robocop and Space4U projects.
 
  Ronan Mac Laverty is a Principal Engineer at Nokia Research Center, where he leads the Software Platform Technologies group. His main research interest is in applying component-based software engineering techniques, paradigms and technologies in the generation of advanced consumer device software. He received his MSc. from Trinity College Dublin in the field of room acoustics prior to taking a research post at the Technical University of Tampere, where he worked on the EU ESPRIT MIAMI project. Since joining Nokia Researcher Center, he has worked for many internal projects within Nokia, both for its Mobile Phone and Network divisions, and has participated in several EU projects, such as, ESAPS, Robocop and Space4U. He has published papers in the fields of room acoustics, multimodal multimedia and component-based software development. He has also been an architect in the ITEA Robocop and Space4U projects.




T2.2  
Broadband Powerline Communications
 
 
Presenters:
Mark K. Eyer, Sony Electronics, USA
 
 
Organizers:
Jean Baronas, Sony Electronics, San Jose, USA
Ed Barrett, Sony Electronics, Itasca, USA
 
  Abstract
 
  In recent years, a variety of alternative transmission means have been employed to deliver high-speed digital data to and from consumer devices and the public Internet, including telephone wires, satellite, the cable that delivers television service, and wireless technologies. Recently, a number of key technical obstacles to the use of the AC power line wiring for this purpose have been overcome, and broadband powerline (BPL) technology has become a new contender for high-speed networking and internet access applications. This tutorial describes the basics of BPL technology, and covers its features and benefits, existing and anticipated application areas, underlying approach to the physical and media access control layers, issues related to co-existence of different BPL technologies and applications, and the technological challenges and hurdles it faces to reach full and ubiquitous acceptance by consumers.
 
  The tutorial will address two main application areas of BPL technology, in-home networking and internet access service offered by the power utility. Issues related to the coexistence of these applications in the same dwelling will be described, as will issues brought about by the possible use of devices with differing MAC/PHY architectures in the same home. A number of possible approaches to coexistence have been proposed; these will be reviewed. Finally, an update will be provided on activities in the standards arena relating to BPL and powerline communications.
 

  Mark K. Eyer is currently Director of Systems for the Technology Standards Office of Sony Electronics. He graduated Cum Laude with a B.S. degree from the University of Washington in 1973 and received an MSEE degree in 1978 from the same institution. For the past twenty years, Mark has been involved with the development of technologies and products related to secure and digital television and he holds eighteen US patents in these areas. Since 1994, Mark has been involved in the standards development process and made contributions to various digital television standards published by the Consumer Electronics Association, Society for Cable Telecommunications Engineers, and the Advanced Television Systems Committee (ATSC). In 2002, McGraw-Hill published Mark's book entitled PSIP: Program and System Information Protocol, based on his work on the ATSC A/65 standard. In 2005, ANSI awarded Mark the 2005 Finegan Standards Medal, which honors an individual who has shown extraordinary leadership in the actual development and application of voluntary standards. Mr. Eyer represents Sony in various standards committees in the US and contributes systems engineering expertise to development of Sony's digital television products.
 




T3.1  
High-Performance Storage for CE Devices
 
 
Presenters:
Jorge Campello, Hitachi GST, USA
Donald Molaro, Hitachi GST, USA
 
 
Organizer:
Akiomi Kunisa, Sanyo Electric Company, Japan
 
  Abstract
 
  The ability to store and retrieve large amounts of data quickly is becoming a key feature of new consumer electronic designs. Virtually every device category from music players to multi-room video recorders relies on storage in some form. In this tutorial we present information for systems designers that are considering the use of hard disk drives in consumer applications; with a special emphasis on digital video recorders. The tutorial will cover the fundamentals of disc drives, interface characteristics and categories of current and future consumer disk drives. Additionally, the integration of disk drives from the designer's point of view will be covered. The majority of the tutorial will be devoted to software and systems design required to maximize streaming performance from a disk with a particular emphasis on the ATA-7 streaming command set. As a concrete example we will examine the storage software stack of a high performance Linux based media server.
 
  Jorge Campello received Electrical Engineer and M.Sc. in Electrical Engineering degrees from Universidade Federal de Pernambuco, Recife, Brazil in 1992 and 1994 respectively. He received a PhD in Electrical Engineering from Stanford University, Palo Alto, California, in 1999. In 1999 he joined IBM's Almaden Research Center as a Research Staff Member, working on Coding and Information Theory applied to Magnetic Recording Systems. In 2003 he joined Hitachi GST's San Jose Research Center where he is currently a Research Staff Member working in the area of HDD applications to Consumer Electronics.
 
  Donald Molaro is a Sr. Software Engineer with Hitachi GST research and holds a MSc. from the University of Calgary and has over fifteen years of software development experience. He has worked on a number of consumer and professional electronic products including set top and media server systems. Since joining Hitachi GST in August 2004 he has worked on addressing several issues related to the use of HDDs in high-performance multimedia systems.
 


 


T3.2  
When TV Meets IP Networks
 
 
Presenters:
Mary-Luc Champel, Thomson Corporate Research, France
Alan Stein, Thomson Corporate Research, Princeton, USA
 
 
Organizers:
Michael Isnardi, Sarnoff Corporation, Princeton, USA
Jill Boyce, Thomson Corporate Research, Princeton, USA
 
  Abstract
 
  Over the last few years, network communications have gone through many drastic changes that now allow deployment of new services such as TV over IP. Indeed, thanks to both the impressive increase of bandwidth on IP telecommunication backbone networks and to the deployment of DSL, service operators have considered high-speed IP networks as a new means to offer not only Internet access but also telephony and television (live and VoD) services directly to the home, which is commonly called "triple-play". At the same time, telecom operators have conducted many extensive testing and trials so as to deploy IP contribution links to carry live traffic. Finally, TV services can be deployed today as end-to-end services over IP networks from the contribution network, through the distribution network, to the access network (including the home network).
 
  The intent of this tutorial session is to present all the technologies involved along the whole IP network for the deployment of end-to-end TV over IP services. This tutorial will mainly focus on standards such as DVB-IP or ISMA but will also deal with technologies (such as MPEG-4 AVC or Pro-MPEG CoP#3r2 FEC) that can be implemented on top of these standards so as to offer better quality services. Finally, this tutorial will also provide an overview of what is the future of end-to-end TV over IP and what will make this future possible.
 
  Mary-Luc Champel graduated from the ENSIMAG (the French national computer science engineering school) in 1997. He started his career working for the VIACCES (CA) conditional access team of SEMA GROUP TELECOM where he participated in both the development and the installation of VIACESS CA systems all around the world. In late 1999, he integrated THOMSON Corporate Research centre in France and since that moment he has been actively involved in several standardization groups such as DVB-MHP, DVB-IPI, Pro-MPEG Forum and Video Services Forum. Furthermore he participated in the development of DVB-MHP and DVB-IPI prototypes that were demonstrated at major shows such as IFA, CES, NAB and IBC. He is now involved in a research project dealing with Forward Error Correction for TV services over IP networks.
 
  Alan Stein manages Thomson's Wired Systems/IPTV Systems Research Program in Princeton, NJ. He is a 20-year veteran of advanced research, product development and entrepreneurial environments, with expertise in diverse technical areas such as video compression, image processing, networking, real-time/embedded systems and Linux, as well as software process/management methodologies. Alan started his career as a staff member at MIT/Lincoln Laboratory, as architect and principal engineer for real-time imaging radar systems. He then worked at Ariel Corporation, a leading multiprocessor DSP vendor, writing software and firmware for a variety of DSPs and real-time systems. Before joining Thomson, Alan spent six years as an independent software consultant, working on advanced image/video processing projects at Lucent/Bell Labs, Bellcore, Sarnoff Corporation and Signafy, an NEC Labs spinoff. Alan holds a BSEE/Computer Engineering degree from Tufts University.